169 search results - page 1 / 34 » Co-Scheduling Hardware and Software Pipelines |
ASAP
2000
IEEE
13 years 8 months ago
2000
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded proces...
HPCA
1996
IEEE
13 years 9 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
IJPP
2000
13 years 4 months ago
2000
FCCM
2007
IEEE
13 years 11 months ago
2007
IEEE
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
Instruction scheduling methods based on the construction of state diagrams (or automata) have been used for architectures involving deeply pipelined function units. However, the s...