IPPS 1998 - PDF Preprint Papers

IPPS 1998 International Parallel Processing Symposium

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IPPS
1998
IEEE

203views Distributed And Parallel Com...» more IPPS 1998»

Ultrafast Randomized Parallel Construction and Approximation Algorithms for Spanning Forests in Dense Graphs

13 years 8 months ago

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We present a rst randomized Ologk n time and On+m work CRCWPRAM algorithm for nding a spanning forest of an undirected dense graph with n vertices. Furthermore we construct a rando...

Anders Dessmark, Carsten Dorgerloh, Andrzej Lingas...

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Id	Views	Title	Status

1	203	Ultrafast Randomized Parallel Construction and Approximation Algorithms for Spanning Forests in Dense Graphs	claim
2	193	High Performance Linear Algebra Package LAPACK90	claim
3	172	COMPaS: A Pentium Pro PC-based SMP Cluster and Its Experience	claim
4	165	High Performance Data Mining Using Data Cubes on Parallel Computers	claim
5	160	Affordable Fault Tolerance Through Adaptation	claim
6	156	A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array	claim
7	154	Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors	claim
8	154	An Architecture for Network Resource Monitoring in a Distributed Environment	claim
9	154	A Survey of Randomness and Parallelism in Comparison Problems	claim
10	154	A Configurable Computing Approach Towards Real-Time Target Tracking	claim
11	153	Eliminating the Protocol Stack for Socket Based Communication in Shared Memory Interconnects	claim
12	152	EDF Consensus on CAN Bus Access for Dynamic Real-Time Applications	claim
13	152	Emulating Direct Products by Index-Shuffle Graphs	claim
14	152	Performance and Experience with LAPI - a New High-Performance Communication Library for the IBM RS/6000 SP	claim
15	151	Experimental Study of Compiler Techniques for NUMA Machines	claim
16	150	Code Transformations for Low Power Caching in Embedded Multimedia Processors	claim
17	148	Configuration Independent Analysis for Characterizing Shared-Memory Applications	claim
18	145	Design and Implementation of a Parallel I/O Runtime System for Irregular Applications	claim
19	144	A Hardware/Software Co-Design System Using Configurable Computing Technology	claim
20	143	Performance Analysis of a Fault-Tolerant Scheme for Location Management of Mobile Hosts	claim
21	143	Meta-heuristics for Circuit Partitioning in Parallel Test Generation	claim
22	142	Local Enumeration Techniques for Sparse Algorithms	claim
23	140	A Parallel Evolutionary Algorithm for the Vehicle Routing Problem with Heterogeneous Fleet	claim
24	140	NC Algorithms for the Single Most Vital Edge Problem with Respect to All Pairs Shortest Paths	claim
25	139	Rapid Development of Real-Time Systems Using RTExpress	claim
26	137	Managing Concurrent Access for Shared Memory Active Messages	claim
27	137	Failure Recovery for Distributed Processes in Single System Image Clusters	claim
28	137	Automatically Proving UNITY Safety Properties with Arrays and Quantifiers	claim
29	135	Prioritized Token-Based Mutual Exclusion for Distributed Systems	claim
30	134	Virtual FPGAs: Some Steps Behind the Physical Barriers	claim
31	134	Automatic Differentiation for Message-Passing Parallel Programs	claim
32	134	Efficient Runtime Thread Management for the Nano-Threads Programming Model	claim
33	133	A Flexible Approach for a Fault-Tolerant Router	claim
34	133	Fault-Tolerant Message Routing for Multiprocessors	claim
35	132	An Object Model for Multiprogramming	claim
36	132	A Comparative Study of Five Parallel Genetic Algorithms Using the Traveling Salesman Problem	claim
37	131	On Randomized and Deterministic Schemes for Routing and Sorting on Fixed-Connection Networks	claim
38	131	Efficient Fine-Grain Thread Migration with Active Threads	claim
39	130	A Mapping Methodology for Designing Software Task Pipelines for Embedded Signal Processing	claim
40	130	Airshed Pollution Modeling: A Case Study in Application Development in an HPF Environment	claim
41	129	Hyper Butterfly Network: A Scalable Optimally Fault Tolerant Architecture	claim
42	128	On the Automatic Validation of Parameterized Unity Programs	claim
43	128	Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers	claim
44	128	A Java Development and Runtime Environment for Reconfigurable Computing	claim
45	128	Design and Implementation of the FRIENDS System	claim
46	128	Benchmarking the Task Graph Scheduling Algorithms	claim
47	127	Performance Sensitivity of Space Sharing Processor Scheduling in Distributed-Memory Multicomputers	claim
48	127	Toward Embedded Development from Advanced Khoros	claim
49	127	A Flexible Class of Parallel Matrix Multiplication Algorithms	claim
50	127	Multiprocessor Scheduling Using Mean-Field Annealing	claim
51	126	Partial Rearrangements of Space-Shared FPGAs	claim
52	126	A Generalized Framework for Global Communication Optimization	claim
53	126	A Scalable VLSI Architecture for Binary Prefix Sums	claim
54	124	NoWait-RPC: Extending ONC RPC to a Fully Compatible Message Passing System	claim
55	124	A Development Tool Environment for Configuration, Build, and Launch of Complex Applications	claim
56	124	High-Performance External Computations Using User-Controllable I/O	claim
57	123	Capturing the Connectivity of High-Dimensional Geometric Spaces by Parallelizable Random Sampling Techniques	claim
58	123	PACE: Processor Architectures for Circuit Emulation	claim
59	122	Implementing Parallelism in Random Discrete Event-Driven Simulation	claim
60	122	Design of a FEM Computation Engine for Real-Time Laparoscopic Surgery Simulation	claim
61	121	Artificial Neural Networks on Reconfigurable Meshes	claim
62	121	BIP: A New Protocol Designed for High Performance Networking on Myrinet	claim
63	121	Comparing the Optimal Performance of Different MIMD Multiprocessor Architectures	claim
64	120	Modeling and Validation Support for Interactive Networked Multimedia Applications	claim
65	120	An Evolutionary Approach to Multiprocessor Scheduling of Dependent Tasks	claim
66	120	Runtime Support for Virtual BSP Computer	claim
67	119	Compiler-Optimization of Implicit Reductions for Distributed Memory Multiprocessors	claim
68	118	Predicated Software Pipelining Technique for Loops with Conditions	claim
69	117	Asymptotically Optimal Randomized Tree Embedding in Static Networks	claim
70	117	Nearly Optimal Algorithms for Broadcast on d-Dimensional All-Port and Wormhole-Routed Torus	claim
71	116	Locality and Performance of Page- and Object-Based DSMs	claim
72	116	Predicting the Running Times of Parallel Programs by Simulation	claim
73	116	The Effect of the Router Arbitration Policy on the Scalability of ServerNet	claim
74	115	Vector Prefix and Reduction Computation on Coarse-Grained, Distributed-Memory Parallel Machines	claim
75	115	Register-Sensitive Software Pipelining	claim
76	114	Aggressive Dynamic Execution of Multimedia Kernel Traces	claim
77	114	Multiparadigm, Multilingual Interoperability: Experience with Converse	claim
78	114	The Implicit Pipeline Method	claim
79	112	A Performance Evaluation of CP List Scheduling Heuristics for Communication Intensive Task Graphs	claim
80	112	The Timewheel Group Membership Protocol	claim
81	111	VPPB - A Visualization and Performance Prediction Tool for Multithreaded Solaris Programs	claim
82	111	DEEP: A Development Environment for Parallel Programs	claim
83	111	Evolving Processes and Evolution Schedulers for Concurrent Scheduling Controls and Parallel Evolutionary Computation	claim
84	111	Migration and Rollback Transparency for Arbitrary Distributed Applications in Workstation Clusters	claim
85	111	Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication	claim
86	110	A Synthesis Method for Fault-Tolerant Multicast Routing Protocol	claim
87	110	Fault Tolerant Mobility Planning for Rapidly Deployable Wireless Networks	claim
88	110	Temporal Partitioning for Partially-Reconfigurable-Field-Programmable Gate	claim
89	109	Partitioned Schedules for Clustered VLIW Architectures	claim
90	109	Tree-Based Multicasting in Wormhole-Routed Irregular Topologies	claim
91	108	Multiprocessor Architectures Using Multi-Hop Multi-OPS Lightwave Networks and Distributed Control	claim
92	108	Optimally Locating a Structured Facility of a Specified Length in a Weighted Tree Network	claim
93	108	NTI: A Network Time Interface M-Module for High-Accuracy Clock-Synchronization	claim
94	108	Thread-Based vs Event-Based Implementation of a Group Communication Service	claim
95	107	Memory Hierarchy Management for Iterative Graph Structures	claim
96	107	Performance Analysis of Parallel Embedded Real Time Systems Based on Measurement and Visualization	claim
97	107	Randomized Algorithms on the Mesh	claim
98	107	Guidelines for Data-Parallel Cycle-Stealing in Networks of Workstations	claim
99	106	Low Memory Cost Dynamic Scheduling of Large Coarse Grain Task Graphs	claim
100	106	Replicated Shared Object Model for Edge Detection with Spiral Architecture	claim
101	105	Processor Lower Bound Formulas for Array Computations and Parametric Diophantine Systems	claim
102	105	Randomized Routing and PRAM Emulation on Parallel Machines	claim
103	105	Dynamic Processor Allocation with the Solaris Operating System	claim
104	105	A Molecular Quasi-Random Model of Computations Applied to Evaluate Collective Intelligence	claim
105	104	Trace-Driven Debugging of Message Passing Programs	claim
106	104	A Generalized Forward Recovery Checkpointing Scheme	claim
107	104	A Clustered Approach to Multithreaded Processors	claim
108	104	A New Self-Routing Multicast Network	claim
109	104	Protocols for Non-Deterministic Communication over Synchronous Channels	claim
110	103	Improved Concurrency Control Techniques For Multi-Dimensional Index Structures	claim
111	103	Network-Aware Distributed Computing: A Case Study	claim
112	102	Fault-Tolerant Broadcasting in Toroidal Networks	claim
113	102	Memory Space Representation for Heterogeneous Network Process Migration	claim
114	102	Update Protocols and Iterative Scientific Applications	claim
115	102	Automated Verification of Communication Protocols Using CCS and BDDs	claim
116	101	Optimistic Synchronization of Mixed-Mode Simulators	claim
117	101	An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures	claim
118	101	A Mathematical Benefit Analysis of Context Switching Reconfigurable Computing	claim
119	100	Optimal Contention-Free Unicast-Based Multicasting in Switch-Based Networks of Workstations	claim
120	100	Randomization in Parallel Stringology	claim
121	100	A Resource Management Model for Dynamic, Scalable, Dependable, Real-Time Systems	claim
122	100	Preliminary Results from a Parallel MATLAB Compiler	claim
123	100	Random Sampling Techniques in Parallel Computation	claim
124	100	HIPIQS: A High-Performance Switch Architecture Using Input Queuing	claim
125	100	Solving the Maximum Clique Problem Using PUBB	claim
126	99	Optimal Bounds on Tail Probabilities - A Simplified Approach	claim
127	99	Experimental Validation of Parallel Computation Models on the Intel Paragon	claim
128	99	A Performance Modeling and Analysis Environment for Reconfigurable Computers	claim
129	98	An O((log log n)2) Time Convex Hull Algorithm on Reconfigurable Meshes	claim
130	98	Broadcast-Efficient Algorithms on the Coarse-Grain Broadcast Communication Model with Few Channels	claim
131	98	Performance Prediction in Production Environments	claim
132	97	Measuring the Vulnerability of Interconnection Networks in Embedded Systems	claim
133	97	Performance Range Comparison via Crossing Point Analysis	claim
134	96	ScalParC: A New Scalable and Efficient Parallel Classification Algorithm for Mining Large Datasets	claim
135	96	Using PI/OT to Support Complex Parallel I/O	claim
136	96	Caching-Efficient Multithreaded Fast Multiplication of Sparse Matrices	claim
137	95	PULC: ParaStation User-Level Communication. Design and Overview	claim
138	95	Optimal Communication Performance on Fast Ethernet with GAMMA	claim
139	95	SIMD and Mixed-Mode Implementations of a Visual Tracking Algorithm	claim
140	95	Jacobi Orderings for Multi-Port Hypercubes	claim
141	94	On the Bisection Width and Expansion of Butterfly Networks	claim
142	94	Parallel Performance Visualization Using Moments of Utilization Data	claim
143	94	Parallel Optimisation in the SCOOP Library	claim
144	94	A Topology Based Approach to Coordinated Multicast Operations	claim
145	93	MPI on NT: A Preliminary Evaluation of the Available Environments	claim
146	93	Tailoring UNITY to Distributed Program Design	claim
147	93	Computing with Evolving Proteins	claim
148	93	Synthesis of a Systolic Array Genetic Algorithm	claim
149	93	Scheduling with Communication Delays and Data Routing in Message Passing Architectures	claim
150	93	Using the BSP Cost Model to Optimise Parallel Neural Network Training	claim
151	93	Synchronizing Operations on Multiple Objects	claim
152	92	Hardware Reconfigurable Neural Networks	claim
153	92	Thermal Management in Embedded Systems Using MEMS	claim
154	92	Mechanically Verifying the Correctness of the Fast Fourier Transform in ACL2	claim
155	91	Sorting on Clusters of SMPs	claim
156	91	Deterministic Routing of h-relations on the Multibutterfly	claim
157	90	Sharing Random Bits with No Process Coordination	claim
158	89	Multicasting and Broadcasting in Large WDM Networks	claim
159	89	Building BSP Programs Using the Refinement Calculus	claim
160	88	Utilization and Predictability in Scheduling the IBM SP2 with Backfilling	claim
161	88	An Efficient RMS Admission Control and Its Application to Multiprocessor Scheduling	claim
162	88	Fault-Tolerant Switched Local Area Networks	claim
163	88	Deriving Efficient Cache Coherence Protocols through Refinement	claim
164	87	Surge Handling as a Measure of Real-Time System Dependability	claim
165	87	Parallel Randomized Techniques for Some Fundamental Geometric Problems: A Survey	claim
166	86	An Improved Output-Size Sensitive Parallel Algorithm for Hidden-Surface Removal for Terrains	claim
167	86	An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams	claim
168	86	An Empirical Comparison of Runtime Systems for Conservative Parallel Simulation	claim
169	86	Optimal Configuration of Compute Nodes for Synthetic Aperture Radar Processing	claim
170	86	Resource Reservation for Adaptive QOS Mapping in Real-Time Mach	claim
171	86	Checkpointing Protocols in Distributed Systems with Mobile Hosts: A Performance Analysis	claim
172	86	A Fault-Tolerant Parallel Heuristic for Assignment Problems	claim
173	85	An Efficient Counting Network	claim
174	85	Rendering Computer Animations on a Network of Workstations	claim
175	85	Hiding Communication Latency in Data Parallel Applications	claim
176	84	Derivation of Fail-Aware Membership Service Specifications	claim
177	83	Testing of Synchronization Conditions for Distributed Real-Time Applications	claim
178	83	Object Nets for the Design and Verification of Distributed and Embedded Applications	claim
179	83	Distributed Dynamic Control of Circuit-Switched Banyan Networks	claim
180	82	The Generalized Lambda Test	claim
181	82	Locality Optimization for Program Instances	claim
182	82	Partial Security and Timeliness in Real-Time Database Systems	claim
183	82	An Introduction to Mobile UNITY	claim
184	82	Self-Testing Fault-Tolerant Real-Time Systems	claim
185	82	A Quantitative Code Analysis of Scientific Systolic Programs: DSP vs. Matrix Algorithms	claim
186	81	Evaluation of a Low-Power Reconfigurable DSP Architecture	claim
187	81	Experiments with Program Parallelization Using Archetypes and Stepwise Refinement	claim
188	81	A Tree-Driven Multiple-Rate Model of Time Measuring in Object-Oriented Real-Time Systems	claim
189	81	Optimizing Data Scheduling on Processor-in-Memory Arrays	claim
190	80	Toward a Universal Mapping Algorithm for Accessing Trees in Parallel Memory Systems	claim
191	80	Lower Bounds on Communication Loads and Optimal Placements in Torus Networks	claim
192	80	Evaluation of Compiler and Runtime Library Approaches for Supporting Parallel Regular Applications	claim
193	80	A Simulator for the Reconfigurable Mesh Architecture	claim
194	79	Optimal All-to-Some Personalized Communication on Hypercubes	claim
195	79	A Case for Aggregate Networks	claim
196	78	C++ Expression Templates Performance Issues in Scientific Computing	claim
197	77	Evaluating ASIC, DSP, and RISC Architectures for Embedded Applications	claim
198	77	A Reconfigurable Hardware-Monitor for Communication Analysis in Distributed Real-Time Systems	claim
199	77	Data Parallel Programming with the Khoros Data Services Library	claim
200	77	Predicate Control for Active Debugging of Distributed Programs	claim
201	74	On Reconfigurable Co-processing Units	claim
202	73	HOSMII: A Virtual Hardware Integrated with DRAM	claim
203	71	Clustering and Reassignment-Based Mapping Strategy for Message Passing Architectures	claim
204	67	Optimizing Parallel Applications for Wide-Area Clusters	claim
205	63	Reconfigurable Wormhole Networks: A Realistic Approach	claim

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