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TVLSI
2002
94views more  TVLSI 2002»
13 years 4 months ago
A network flow approach to memory bandwidth utilization in embedded DSP core processors
This paper presents a network flow approach to solving the register binding and allocation problem for multiword memory access DSP processors. In recently announced DSP processors,...
Catherine H. Gebotys
ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
13 years 9 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
ICESS
2007
Springer
13 years 11 months ago
Memory Offset Assignment for DSPs
Compact code generation is very important for an embedded system that has to be implemented on a chip with a severely limited amount of size. Even though on-chip data memory optimi...
Jinpyo Hong, J. Ramanujam
CASES
2003
ACM
13 years 10 months ago
Compiler optimization and ordering effects on VLIW code compression
Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated co...
Montserrat Ros, Peter Sutton
LCPC
2000
Springer
13 years 8 months ago
Improving Offset Assignment for Embedded Processors
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in applicat...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir