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» Code Transformations to Improve Memory Parallelism
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MICRO
1999
IEEE
143views Hardware» more  MICRO 1999»
13 years 9 months ago
Code Transformations to Improve Memory Parallelism
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
Vijay S. Pai, Sarita V. Adve
SAC
2002
ACM
13 years 4 months ago
Automatic code generation for executing tiled nested loops onto parallel architectures
This paper presents a novel approach for the problem of generating tiled code for nested for-loops using a tiling transformation. Tiling or supernode transformation has been widel...
Georgios I. Goumas, Maria Athanasaki, Nectarios Ko...
EUROPAR
2010
Springer
13 years 6 months ago
Multithreaded Geant4: Semi-automatic Transformation into Scalable Thread-Parallel Software
This work presents an application case study. Geant4 is a 750,000 line toolkit first designed in the mid-1990s and originally intended only for sequential computation. Intel's...
Xin Dong 0004, Gene Cooperman, John Apostolakis
IEEEPACT
1998
IEEE
13 years 9 months ago
Parallelization of Benchmarks for Scalable Shared-Memory Multiprocessors
This work identifies practical compiling techniques for scalable shared memory machines. For this, we have focused on experimental studies using a real machine and representative ...
Yunheung Paek, Angeles G. Navarro, Emilio L. Zapat...
HIPC
2000
Springer
13 years 8 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir