8 search results - page 2 / 2 » Coherence Ordering for Ring-based Chip Multiprocessors |
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Snoopy cache coherence can be implemented in any physical network topology by embedding a logical unidirectional ring in the network. Control messages are forwarded using the ring...
DSD
2009
IEEE
13 years 9 months ago
2009
IEEE
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...