4 search results - page 1 / 1 » Combined Code Motion and Register Allocation Using the Value... |
CC
2003
Springer
13 years 10 months ago
2003
Springer
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
CC
2004
Springer
13 years 10 months ago
2004
Springer
An important issue in embedded systems design is the size of programs. As computing devices decrease in size, yet with more and more functions, better code size optimizations are i...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
ICS
1995
Tsinghua U.
13 years 8 months ago
1995
Tsinghua U.
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...