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DATE
2000
IEEE
121views Hardware» more  DATE 2000»
13 years 9 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
CC
2007
Springer
13 years 11 months ago
Correcting the Dynamic Call Graph Using Control-Flow Constraints
Abstract. To reason about programs, dynamic optimizers and analysis tools use sampling to collect a dynamic call graph (DCG). However, sampling has not achieved high accuracy with ...
Byeongcheol Lee, Kevin Resnick, Michael D. Bond, K...
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
13 years 7 months ago
A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-S...
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 9 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 2 months ago
Architectural Support for Run-Time Validation of Control Flow Transfer
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
Yixin Shi, Sean Dempsey, Gyungho Lee