13 search results - page 1 / 3 » Combined dynamic voltage scaling and adaptive body biasing f... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limi...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Parameter variation is detrimental to a processor’s frequency and leakage power. One proposed technique to mitigate it is Fine-Grain Body Biasing (FGBB), where different parts o...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
We present a Dynamic VTH Scaling (DVTS) scheme to save the leakage power during active mode of the circuit. The power saving strategy of DVTS is similar to that of the Dynamic VDD...