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» Combining Software and Hardware Verification Techniques
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WETICE
2006
IEEE
13 years 11 months ago
Security Verification Techniques Applied to PatchLink COTS Software
Verification of the security of software artifacts is a challenging task. An integrated approach that combines verification techniques can increase the confidence in the security ...
David P. Gilliam, John D. Powell, Matt Bishop, Chr...
ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
14 years 2 months ago
A low overhead hardware technique for software integrity and confidentiality
Software integrity and confidentiality play a central role in making embedded computer systems resilient to various malicious actions, such as software attacks; probing and tamper...
Austin Rogers, Milena Milenkovic, Aleksandar Milen...
CL
2008
Springer
13 years 5 months ago
Automatic synthesis and verification of real-time embedded software for mobile and ubiquitous systems
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
Pao-Ann Hsiung, Shang-Wei Lin
VLSI
2007
Springer
13 years 11 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
AOSD
2009
ACM
14 years 1 days ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...