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» Compact FPGA implementations of QUAD
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CEE
2007
105views more  CEE 2007»
13 years 5 months ago
Compact modular exponentiation accelerator for modern FPGA devices
We present a compact FPGA implementation of a modular exponentiation accelerator suited for cryptographic applications. The implementation efficiently exploits the properties of m...
Timo Alho, Panu Hämäläinen, Marko H...
FCCM
2003
IEEE
210views VLSI» more  FCCM 2003»
13 years 10 months ago
Compact FPGA-based True and Pseudo Random Number Generators
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
Kuen Hung Tsoi, K. H. Leung, Philip Heng Wai Leong
FPL
2010
Springer
210views Hardware» more  FPL 2010»
13 years 3 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
13 years 12 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
13 years 9 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...