This paper presents a model for simultaneous instruction selection, compaction, and register allocation. An arc mapping model along with logical propositions is used to create an ...
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
Abstract. A Range Minimum Query asks for the position of a minimal element between two specified array-indices. We consider a natural extension of this, where our further constrai...
Abstract. Synthesis of digital signal processing (DSP) software from dataflow-based formal models is an effective approach for tackling the complexity of modern DSP applications. I...
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattac...
The sparse grid discretization technique enables a compressed representation of higher-dimensional functions. In its original form, it relies heavily on recursion and complex data...
Alin Florindor Murarasu, Josef Weidendorfer, Gerri...