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» Comparing Different Serial and Parallel Heuristics to Design...
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DAC
2005
ACM
14 years 6 months ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
ASPLOS
2010
ACM
13 years 10 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
TVLSI
2002
95views more  TVLSI 2002»
13 years 5 months ago
Efficient inductance extraction using circuit-aware techniques
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous ...
Haitian Hu, Sachin S. Sapatnekar
WDAS
1998
13 years 7 months ago
Data Replication and Delay Balancing in Heterogeneous Disk Systems
Declustering and replication are well known techniques used to improve response time of queries in parallel disk environments. As data replication incurs a penalty for updates, da...
Doron Rotem, Sridhar Seshadri, Luis M. Bernardo
DAC
2005
ACM
13 years 7 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro