42 search results - page 3 / 9 » Comparing Static and Dynamic Code Scheduling for Multiple-In... |
DSD
2009
IEEE
13 years 8 months ago
2009
IEEE
Voltage-frequency scaling (VFS) trades a linear processor slowdown for a potentially quadratic reduction in energy consumption. Complex dependencies may exist between different tas...
EUROPAR
2004
Springer
13 years 10 months ago
2004
Springer
Scheduling parallel jobs has been an active investigation area. The scheduler has to deal with heterogeneous workloads and try to obtain throughputs and response times such that en...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
CSSE
2008
IEEE
13 years 11 months ago
2008
IEEE
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...