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» Comparing memory systems for chip multiprocessors
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ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
11 years 7 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
13 years 10 months ago
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip
In this paper is proposed a technique to integrate and simulate a dynamic memory in a multiprocessor framework based on C/C++/SystemC. Using host machine’s memory management cap...
Oreste Villa, Patrick Schaumont, Ingrid Verbauwhed...
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
14 years 1 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
SEUS
2009
IEEE
13 years 11 months ago
A Single-Path Chip-Multiprocessor System
Abstract. In this paper we explore the combination of a time-predictable chipmultiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main me...
Martin Schoeberl, Peter P. Puschner, Raimund Kirne...
EMSOFT
2005
Springer
13 years 10 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir