6 search results - page 1 / 2 » Compiler-Controlled Memory |
ASPLOS
1998
ACM
13 years 9 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
CASES
2004
ACM
13 years 10 months ago
2004
ACM
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
LCPC
2004
Springer
13 years 10 months ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...