8 search results - page 2 / 2 » Compiler-directed instruction cache leakage optimization |
APCSAC
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
IPCCC
2006
IEEE
13 years 11 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
HIPC
1999
Springer
13 years 9 months ago
1999
Springer
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...