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» Compiling ATR Probing Codes for Execution on FPGA Hardware
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FCCM
2002
IEEE
109views VLSI» more  FCCM 2002»
13 years 10 months ago
Compiling ATR Probing Codes for Execution on FPGA Hardware
This paper describes the implementation of an automatic target recognition ATR Probing algorithm on a recon gurable system, using the SA-C programming language and optimizing co...
A. P. Wim Böhm, J. Ross Beveridge, Bruce A. D...
FPL
2008
Springer
180views Hardware» more  FPL 2008»
13 years 6 months ago
Compiled hardware acceleration of Molecular Dynamics code
The objective of Molecular Dynamics (MD) simulations is to determine the shape of a molecule in a given biomolecular environment. These simulations are very demanding computationa...
Jason R. Villarreal, Walid A. Najjar
ISI
2005
Springer
13 years 10 months ago
Performance Study of a Compiler/Hardware Approach to Embedded Systems Security
Abstract. Trusted software execution, prevention of code and data tampering, authentication, and providing a secure environment for software are some of the most important security...
Kripashankar Mohan, Bhagirath Narahari, Rahul Simh...
TACO
2008
130views more  TACO 2008»
13 years 5 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
13 years 5 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam