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» Compiling code accelerators for FPGAs
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HPCC
2007
Springer
13 years 11 months ago
Software Pipelining for Packet Filters
Packet filters play an essential role in traffic management and security management on the Internet. In order to create software-based packet filters that are fast enough to work...
Yoshiyuki Yamashita, Masato Tsuru
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 1 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
PPPJ
2009
ACM
14 years 6 days ago
Automatic parallelization for graphics processing units
Accelerated graphics cards, or Graphics Processing Units (GPUs), have become ubiquitous in recent years. On the right kinds of problems, GPUs greatly surpass CPUs in terms of raw ...
Alan Leung, Ondrej Lhoták, Ghulam Lashari
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 3 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
13 years 10 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis