82 search results - page 3 / 17 » Compiling code accelerators for FPGAs |
CC
2008
Springer
13 years 7 months ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
FPL
2008
Springer
13 years 7 months ago
2008
Springer
The objective of Molecular Dynamics (MD) simulations is to determine the shape of a molecule in a given biomolecular environment. These simulations are very demanding computationa...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Publish-subscribe systems present the state of the art in information dissemination to multiple users. Such systems have evolved from simple topic-based to the current XM...
ICVS
2001
Springer
13 years 10 months ago
2001
Springer
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
ICCD
1993
IEEE
13 years 9 months ago
1993
IEEE
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...