1133 search results - page 4 / 227 » Compiling for Speculative Architectures |
FCCM
2005
IEEE
13 years 11 months ago
2005
IEEE
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
ISCA
1995
IEEE
13 years 9 months ago
1995
IEEE
Speculative execution is execution of instructions before it is known whether these instructions should be executed. Compiler-based speculative execution has the potential to achi...
TPDS
2010
13 years 3 months ago
2010
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
MICRO
1993
IEEE
13 years 9 months ago
1993
IEEE
Compiler-controlled speculative execution has been shown to be e ective in increasing the availableinstruction level parallelism ILP found in non-numeric programs. An importantpr...
ICPP
2007
IEEE
13 years 11 months ago
2007
IEEE
As multi-core microprocessors are becoming widely adopted, the need to extract thread-level parallelism (TLP) from single-threaded applications in a seamless fashion increases. In...