15 search results - page 2 / 3 » Compositional static instruction cache simulation |
IEEEPACT
1999
IEEE
13 years 9 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
CSSE
2008
IEEE
13 years 11 months ago
2008
IEEE
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
ISPASS
2009
IEEE
13 years 12 months ago
2009
IEEE
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
EUROPAR
1999
Springer
13 years 9 months ago
1999
Springer
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
ACMMSP
2004
ACM
13 years 10 months ago
2004
ACM
Feedback-directed optimization has become an increasingly important tool in designing and building optimizing compilers. Recently, reuse-distance analysis has shown much promise i...