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ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
13 years 12 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
CCGRID
2006
IEEE
13 years 11 months ago
Analysis of Query Matching Criteria and Resource Monitoring Models for Grid Application Scheduling
Making effective use of computational Grids requires scheduling Grid applications onto resources that best match them. Resource-related state (e.g., load, availability, and locati...
Ronak Desai, Sameer Tilak, Bhavin Gandhi, Michael ...
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
13 years 11 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
PODC
2010
ACM
13 years 9 months ago
Constant RMR solutions to reader writer synchronization
We study Reader-Writer Exclusion [1], a well-known variant of the Mutual Exclusion problem [2] where processes are divided into two classes–readers and writers–and multiple re...
Vibhor Bhatt, Prasad Jayanti
USENIX
2008
13 years 8 months ago
Vx32: Lightweight User-level Sandboxing on the x86
Code sandboxing is useful for many purposes, but most sandboxing techniques require kernel modifications, do not completely isolate guest code, or incur substantial performance co...
Bryan Ford, Russ Cox