Sciweavers

309 search results - page 1 / 62
» Concurrent timing optimization of latch-based digital system...
Sort
View
ICCD
1995
IEEE
83views Hardware» more  ICCD 1995»
13 years 8 months ago
Concurrent timing optimization of latch-based digital systems
Many design techniques have been proposed to optimize the performance of a digital system implemented in a given technology. Each of these techniques can be advantageous in partic...
Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C...
VLDB
1991
ACM
146views Database» more  VLDB 1991»
13 years 8 months ago
Adaptive Load Control in Transaction Processing Systems
Thrashing in transactionprocessingsystemscan be prevented by controlling the number of concurrently running transactions. Becausethe optimal concurrency level strongly dependson t...
Hans-Ulrich Heiss, Roger Wagner
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
13 years 9 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
13 years 10 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
IPPS
2002
IEEE
13 years 9 months ago
Overview of Hydra: A Concurrent Language for Synchronous Digital Circuit Design
Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit speci...
John O'Donnell