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ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
13 years 10 months ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
ASPLOS
2000
ACM
13 years 9 months ago
Communication Scheduling
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units, multiple register files, and explicit interconnect betw...
Peter R. Mattson, William J. Dally, Scott Rixner, ...
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
13 years 8 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
13 years 9 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...