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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 1 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
NCA
2007
IEEE
13 years 11 months ago
Scheduling Bulk File Transfers with Start and End Times
The advancement of optical networking technologies has enabled e-science applications that often require transport of large volumes of scientific data. In support of such data-in...
Kannan Rajah, Sanjay Ranka, Ye Xia
COMCOM
2006
147views more  COMCOM 2006»
13 years 5 months ago
Coverage-adaptive random sensor scheduling for application-aware data gathering in wireless sensor networks
Due to the application-specific nature of wireless sensor networks, application-aware algorithm and protocol design paradigms are highly required in order to optimize the overall ...
Wook Choi, Sajal K. Das
BMCBI
2008
109views more  BMCBI 2008»
13 years 5 months ago
Merging microsatellite data: enhanced methodology and software to combine genotype data for linkage and association analysis
Background: Correctly merged data sets that have been independently genotyped can increase statistical power in linkage and association studies. However, alleles from microsatelli...
Angela P. Presson, Eric M. Sobel, Paivi Pajukanta,...