105 search results - page 2 / 21 » Constant Multipliers for FPGAs |
FPL
1995
Springer
13 years 9 months ago
1995
Springer
Abstract. FPGAs have been proposed as high-performance alternatives to DSP processors. This paper quantitatively compares FPGA performance against DSP processors and ASICs using ac...
CDES
2006
13 years 6 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Constant-coefficient multipliers are fundamental components in digital signal processing and arithmetic-based systems. Their verification, however, remains difficult and time-cons...
FPGA
2005
ACM
13 years 11 months ago
2005
ACM
Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...