Sciweavers

6 search results - page 1 / 2
» Constraint-Driven Instructions Selection and Application Sch...
Sort
View
ASAP
2009
IEEE
131views Hardware» more  ASAP 2009»
13 years 10 months ago
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system
This paper presents a new constraint-driven method for computational pattern selection, mapping and application scheduling using reconfigurable processor extensions. The presente...
Kevin Martin, Christophe Wolinski, Krzysztof Kuchc...
ECRTS
2006
IEEE
13 years 11 months ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
DAC
1998
ACM
14 years 5 months ago
Power Optimization of Variable Voltage Core-Based Systems
The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by domin...
Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkon...
RTSS
2002
IEEE
13 years 9 months ago
Soft Real- Time Scheduling on Simultaneous Multithreaded Processors
Simultaneous multithreading (SMT) improves processor throughput by processing instructions from multiple threads each cycle. This is the first work to explore soft real-time sche...
Rohit Jain, Christopher J. Hughes, Sarita V. Adve
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
13 years 8 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel