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» Control Flow Emulation on Tiled SIMD Architectures
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CC
2008
Springer
144views System Software» more  CC 2008»
10 years 6 months ago
Control Flow Emulation on Tiled SIMD Architectures
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
Ghulam Lashari, Ondrej Lhoták, Michael McCo...
ICCD
2004
IEEE
158views Hardware» more  ICCD 2004»
11 years 1 months ago
An Embedded Reconfigurable SIMD DSP with Capability of Dimension-Controllable Vector Processing
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Z...
CF
2007
ACM
10 years 8 months ago
Converting massive TLP to DLP: a special-purpose processor for molecular orbital computations
We propose an application specific processor for computational quantum chemistry. The kernel of interest is the computation of electron repulsion integrals (ERIs), which vary in c...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...
CCS
2010
ACM
10 years 4 months ago
CRAFT: a new secure congestion control architecture
Congestion control algorithms seek to optimally utilize network resources by allocating a certain rate for each user. However, malicious clients can disregard the congestion contr...
Dongho Kim, Jerry T. Chiang, Yih-Chun Hu, Adrian P...
CCR
2008
170views more  CCR 2008»
10 years 4 months ago
Probe-Aided MulTCP: an aggregate congestion control mechanism
An aggregate congestion control mechanism, namely ProbeAided MulTCP (PA-MulTCP), is proposed in this paper. It is based on MulTCP, a proposal for enabling an aggregate to emulate ...
Fang-Chun Kuo, Xiaoming Fu
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