10 search results - page 1 / 2 » Control Flow Speculation in Multiscalar Processors |
HPCA
1997
IEEE
13 years 8 months ago
1997
IEEE
MICRO
1998
IEEE
13 years 9 months ago
1998
IEEE
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
MICRO
1999
IEEE
13 years 9 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
MICRO
2009
IEEE
13 years 12 months ago
2009
IEEE
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
EUROMICRO
1998
IEEE
13 years 9 months ago
1998
IEEE
In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...