94 search results - page 2 / 19 » Control Independence in Trace Processors |
ISCA
1992
IEEE
13 years 9 months ago
1992
IEEE
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
IPPS
2005
IEEE
13 years 11 months ago
2005
IEEE
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
A microprocessor's performance is fundamentally limited by the rate at which it can resolve branch mispredictions. Control independence (CI) architectures look for useful con...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
The negative performance impact of branch mis-predictions can be reduced by exploiting control independence (CI). When a branch mis-predicts, the wrong-path instructions up to the...
PACS
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. This paper introduces the concept of context-independent coding using frequency-based mapping schemes in order to reduce off-chip interconnect power consumption. State-of...