3 search results - page 1 / 1 » Convergence analysis of a background interstage gain calibra... |
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
A mathematical framework for the convergence analysis of a pipelined ADC with background gain calibration is presented. The constraints on adaptation step size for mean convergenc...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
—This paper presents an incomplete settling design technique for switched-capacitor pipelined analog-to-digital converters (ADCs) to improve conversion rate. An improved multiply...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— This work presents a robust background calibration scheme for switched-capacitor (SC) pipelined analog-to-digital converters. A SC multiplying digital-to-analog converter (MDAC...