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DATE
1998
IEEE
106views Hardware» more  DATE 1998»
13 years 10 months ago
March Tests for Word-Oriented Memories
Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e....
A. J. van de Goor, Issam B. S. Tlili
VTS
2006
IEEE
93views Hardware» more  VTS 2006»
13 years 11 months ago
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...
Vishwani D. Agrawal, Soumitra Bose, Vijay Gangaram
KBSE
2005
IEEE
13 years 11 months ago
An analysis of rule coverage as a criterion in generating minimal test suites for grammar-based software
The term grammar-based software describes software whose input can be specified by a context-free grammar. This grammar may occur explicitly in the software, in the form of an in...
Mark Hennessy, James F. Power
TC
1998
13 years 5 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
RTS
2006
96views more  RTS 2006»
13 years 5 months ago
The TTA's Approach to Resilience after Transient Upsets
Abstract. The Time-Triggered Architecture, as architecture for safety-critical realtime applications, incorporates fault-tolerance mechanisms to ensure correct system operation des...
Wilfried Steiner, Michael Paulitsch, Hermann Kopet...