27 search results - page 4 / 6 » Cost-free scan: a low-overhead scan path design |
DELTA
2004
IEEE
13 years 9 months ago
2004
IEEE
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
DSN
2009
IEEE
14 years 15 days ago
2009
IEEE
Topological worms, such as those that propagate by following links in an overlay network, have the potential to spread faster than traditional random scanning worms because they h...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
- This paper presents a non-scan design-for-testability technique applicable to register-transfer(RT) level data path circuits, which are usually very hard-to-test due to the prese...
DAC
1999
ACM
14 years 6 months ago
1999
ACM
This paper presents a synthesis tool ICEBERG for embedded in-circuit emulators (ICE's), that are part of the development environment for microcontroller (or microprocessor)-b...
MM
2004
ACM
13 years 11 months ago
2004
ACM
This paper proposes a visual representation named scene tunnel to archive and visualize urban scenes for Internet based virtual tour. We scan cityscapes using multiple cameras on ...