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DAC
2001
ACM
14 years 6 months ago
Coupling-Driven Bus Design for Low-Power Application-Specific Systems
In modern embedded systems including communication and multimedia applications, large fraction of power is consumed during memory access and data transfer. Thus, buses should be d...
Youngsoo Shin, Takayasu Sakurai
ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 9 months ago
Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and system-on-a-chip (SoC) designs. A new low-power bus encoding scheme is proposed t...
Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, ...
ICECCS
2009
IEEE
166views Hardware» more  ICECCS 2009»
13 years 2 months ago
ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs
In hard real-time systems such as avionics, computer board level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on co...
Min-Young Nam, Rodolfo Pellizzoni, Lui Sha, Richar...
DAC
2001
ACM
14 years 6 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel
DAC
2009
ACM
14 years 6 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...