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VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
13 years 3 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
SAFECOMP
2005
Springer
13 years 11 months ago
Control and Data Flow Testing on Function Block Diagrams
As programmable logic controllers(PLCs) have been used in safety-critical applications, testing of PLC applications has become important. The previous PLC-based software testing te...
Eunkyoung Jee, Junbeom Yoo, Sung Deok Cha
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
Improving coverage analysis and test generation for large designs
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
Jules P. Bergmann, Mark Horowitz
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
13 years 9 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham
EMSOFT
2008
Springer
13 years 7 months ago
Randomized directed testing (REDIRECT) for Simulink/Stateflow models
The Simulink/Stateflow (SL/SF) environment from Mathworks is becoming the de facto standard in industry for model based development of embedded control systems. Many commercial to...
Manoranjan Satpathy, Anand Yeolekar, S. Ramesh