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MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 4 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
IPPS
2003
IEEE
13 years 11 months ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
PLDI
1995
ACM
13 years 9 months ago
Tile Size Selection Using Cache Organization and Data Layout
When dense matrix computations are too large to fit in cache, previous research proposes tiling to reduce or eliminate capacity misses. This paper presents a new algorithm for ch...
Stephanie Coleman, Kathryn S. McKinley
PPOPP
2006
ACM
14 years 3 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
RTCSA
1999
IEEE
13 years 10 months ago
A Method to Improve the Estimated Worst-Case Performance of Data Caching
This paper presents a method for tight prediction of worst-case performance of data caches in highperformance real-time systems. Our approach is to distinguish between data struct...
Thomas Lundqvist, Per Stenström