67 search results - page 2 / 14 » Data transformations enabling loop vectorization on multithr... |
SC
1995
ACM
13 years 9 months ago
1995
ACM
This paper presents techniques for compiling loops with complex, indirect array accesses into loops whose array references have at most one level of indirection. The transformatio...
CGO
2008
IEEE
13 years 12 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
IPPS
2009
IEEE
14 years 4 days ago
2009
IEEE
As the number of cores per machine increases, memory architectures are being redesigned to avoid bus contention and sustain higher throughput needs. The emergence of Non-Uniform M...
IPPS
2009
IEEE
14 years 4 days ago
2009
IEEE
Stencil computation (SC) is of critical importance for broad scientific and engineering applications. However, it is a challenge to optimize complex, highorder SC on emerging clus...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
In data dominated applications, loop transformations have a huge impact on the lifetime of array data and therefore on memory footprint. Since a locally optimal loop transformatio...