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DAC
2012
ACM
11 years 7 months ago
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
Adwait Jog, Asit K. Mishra, Cong Xu, Yuan Xie, Vij...
SIGCOMM
2010
ACM
13 years 5 months ago
EffiCuts: optimizing packet classification for memory and throughput
Packet Classification is a key functionality provided by modern routers. Previous decision-tree algorithms, HiCuts and HyperCuts, cut the multi-dimensional rule space to separate ...
Balajee Vamanan, Gwendolyn Voskuilen, T. N. Vijayk...