28 search results - page 2 / 6 » Design Issues and Tradeoffs for Write Buffers |
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
INFOCOM
1994
IEEE
13 years 9 months ago
1994
IEEE
This paper is motivated by the need to support multiple service classes in fast packet-switched networks. We address the problem of characterizing and designing scheduling policie...
JPDC
2006
13 years 5 months ago
2006
The vulnerability of computer nodes due to component failures is a critical issue for cluster-based file systems. This paper studies the development and deployment of mirroring in...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...
ASPLOS
2010
ACM
13 years 8 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...