380 search results - page 1 / 76 » Design Methods for Multiple-Valued Input Address Generators |
ISMVL
2006
IEEE
13 years 10 months ago
2006
IEEE
A multiple-valued input address generator produces a unique address given a multiple-valued input data vector. This paper presents methods to realize multiple-valued input address...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the supe...
ISCAS
1994
IEEE
13 years 8 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
KBSE
2002
IEEE
13 years 9 months ago
2002
IEEE
Generating test inputs for a path in a function with integer and real parameters is an important but difficult problem. The problem becomes more difficult when pointers are pass...
QSIC
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we consider a problem that arises in black box testing: generating small test suites (i.e., sets of test cases) where the combinations that have to be covered are s...