19 search results - page 2 / 4 » Design Verification of the S3.mp Cache-Coherent Shared-Memor... |
SC
1992
ACM
13 years 9 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
DSL
1997
13 years 6 months ago
1997
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
HPCA
1998
IEEE
13 years 9 months ago
1998
IEEE
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
IPPS
2003
IEEE
13 years 10 months ago
2003
IEEE
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols...