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» Design and CAD for 3D integrated circuits
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DAC
2008
ACM
14 years 6 months ago
A progressive-ILP based routing algorithm for cross-referencing biochips
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang...
DAC
2006
ACM
14 years 6 months ago
Standard cell characterization considering lithography induced variations
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
Ke Cao, Sorin Dobre, Jiang Hu
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
13 years 11 months ago
Inductance extraction for general interconnect structures
As the operation frequency reaches gigahertz in very deep-submicron designs, the effect of on-chip inductance on circuit performance can no longer be neglected. Therefore, it is d...
Chun-Ying Lai, Shyh-Kang Jeng, Yao-Wen Chang, Chia...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 2 months ago
Fast wire length estimation by net bundling for block placement
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
Tan Yan, Hiroshi Murata
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
13 years 12 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...