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ASPLOS
1992
ACM
13 years 9 months ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
ISPASS
2010
IEEE
14 years 9 days ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
ISPDC
2010
IEEE
13 years 3 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
MIDDLEWARE
2010
Springer
13 years 3 months ago
Automatically Generating Symbolic Prefetches for Distributed Transactional Memories
Abstract. Developing efficient distributed applications while managing complexity can be challenging. Managing network latency is a key challenge for distributed applications. We ...
Alokika Dash, Brian Demsky
IEEEPACT
2005
IEEE
13 years 11 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...