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» Design and Performance of Multipath MIN Architectures
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MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
13 years 9 months ago
Instruction Fetch Mechanisms for Multipath Execution Processors
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...
Artur Klauser, Dirk Grunwald
DAC
2007
ACM
14 years 6 months ago
Fast Min-Cost Buffer Insertion under Process Variations
Process variation has become a critical problem in modern VLSI fabrication. In the presence of process variation, buffer insertion problem under performance constraints becomes mo...
Ruiming Chen, Hai Zhou
MOBICOM
2006
ACM
13 years 11 months ago
Multipath profile discrimination in TOA-based WLAN ranging with link layer frames
Indoor ranging and location in WLAN is possible through obtaining Round-Trip-Time (RTT) measurements at data link level. This procedure allows using the existing IEEE 802.11 WLAN ...
Marc Ciurana, Francisco Barceló, Sebastiano...