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DAC
2001
ACM
14 years 6 months ago
Automated Pipeline Design
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
Daniel Kroening, Wolfgang J. Paul
DAC
1999
ACM
14 years 6 months ago
Engineering Change: Methodology and Applications to Behavioral and System Synthesis
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...
Darko Kirovski, Miodrag Potkonjak
APSEC
2002
IEEE
13 years 10 months ago
An Automated Refactoring Approach to Design Pattern-Based Program Transformations in Java Programs
Software often needs to be modified for accommodating requirements changes through the software life cycle. To deal with several accidental requirements changes related to softwa...
Sang-Uk Jeon, Joon-Sang Lee, Doo-Hwan Bae
DATE
2002
IEEE
144views Hardware» more  DATE 2002»
13 years 10 months ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
ITC
1999
IEEE
118views Hardware» more  ITC 1999»
13 years 10 months ago
Logic BIST for large industrial designs: real issues and case studies
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K t...
Graham Hetherington, Tony Fryars, Nagesh Tamarapal...