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RTAS
1997
IEEE
13 years 9 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
ANCS
2007
ACM
13 years 9 months ago
Low-latency scheduling in large switches
Scheduling in large switches is challenging. Arbiters must operate at high rates to keep up with the high switching rates demanded by multi-gigabit-per-second link rates and short...
Wladek Olesinski, Nils Gura, Hans Eberle, Andres M...
INFOCOM
1999
IEEE
13 years 9 months ago
A Model for Window Based Flow Control in Packet-Switched Networks
Recently, networks have increased rapidly both in scale and speed. Problems related to the control and management are of increasing interest. The average throughput and end-to-end ...
Xiaowei Yang