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» Design issues for dynamic voltage scaling
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ICCAD
2001
IEEE
127views Hardware» more  ICCAD 2001»
14 years 2 months ago
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...
Gang Qu
ECRTS
2010
IEEE
13 years 6 months ago
Minimizing Multi-resource Energy for Real-Time Systems with Discrete Operation Modes
Energy conservation is an important issue in the design of embedded systems. Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM) are two widely used techniques for sav...
Fanxin Kong, Yiqun Wang, Qingxu Deng, Wang Yi
CSE
2009
IEEE
13 years 8 months ago
Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
Meikang Qiu, Laurence Tianruo Yang, Edwin Hsing-Me...
ISLPED
2006
ACM
70views Hardware» more  ISLPED 2006»
13 years 11 months ago
Sub-threshold design: the challenges of minimizing circuit energy
In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categorie...
Benton H. Calhoun, Alice Wang, Naveen Verma, Anant...
ISCAS
2007
IEEE
135views Hardware» more  ISCAS 2007»
13 years 11 months ago
Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology
Abstract—In the nanometer-scale CMOS technology, the gateoxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the...
Ming-Dou Ker, Hung-Tai Liao