10 search results - page 1 / 2 » Design of Minimal Fault Tolerant On-Board Networks: Practica... |
SIROCCO
2007
13 years 6 months ago
2007
Abstract. The problem we consider originates from the design of efficient on-board networks in satellites (also called Traveling Wave Tube Amplifiers). Signals incoming in the net...
IWCMC
2009
ACM
13 years 12 months ago
2009
ACM
Minimal configuration and quick deployment of ad hoc networks make it suitable for numerous applications such as emergency situations, border monitoring, and military missions, e...
SPAA
2000
ACM
13 years 9 months ago
2000
ACM
In this paper, we study the design of fault tolerant networks for arrays and meshes by adding redundant nodes and edges. For a target graph G (linear array or mesh in this paper),...
DAC
2011
ACM
12 years 5 months ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
SOSP
2007
ACM
14 years 2 months ago
2007
ACM
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limit...