8 search results - page 2 / 2 » Design of Transport Triggered Architecture Processors for Wi... |
ICASSP
2011
IEEE
12 years 9 months ago
2011
IEEE
In this paper, we investigate the opportunities offered by floatingpoint arithmetics in enabling an assembly and intrinsics free highlevel language based development. We compare ...
CSREAESA
2006
13 years 6 months ago
2006
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
IJNSEC
2007
13 years 5 months ago
2007
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...