Sciweavers

8 search results - page 1 / 2
» Design of a High-Performance ATM Firewall
Sort
View
IPPS
1998
IEEE
13 years 9 months ago
BIP: A New Protocol Designed for High Performance Networking on Myrinet
Abstract. High speed networks are now providing incredible performances. Software evolution is slow and the old protocol stacks are no longer adequate for these kind of communicati...
Loïc Prylli, Bernard Tourancheau
ACISP
2000
Springer
13 years 9 months ago
High Performance Agile Crypto Modules
This paper examines the impact of the primary symmetric key cryptographic operation on network data streams, encryption of user data, have on the overall tra c throughput. The encr...
Chandana Gamage, Jussipekka Leiwo, Yuliang Zheng
DAC
2001
ACM
14 years 5 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....